Abstract: This application note discusses the commands that serial-to-JTAG interface boards can receive. The interface board is used to realize the interface with the MAXQ microcontroller. The commands described here can help developers read and write MAXQ memory (code and data), read and write registers, and use the online debugger.
Introduction The MAXQ microcontroller uses a test access port (TAP) to communicate with the host device through a 4-wire synchronous serial interface. The TAP supports in-system programming and online debugging. TAP is compatible with JTAG IEEE standard 1149. In order to realize the connection with TAP, Dallas Semiconductor has developed a serial port to JTAG interface board and firmware, accepts commands through a standard RS-232 serial port, and converts these commands into appropriate JTAG signals. This application note describes the command protocol used by the firmware. If you need more detailed information of serial port to JTAG interface board, please email the question to var name = "micro.software @"; var domain = "dalsemi.com"; document.write ("" + name + domain + ""); micro. (English only).
Download: Source program and schematic in this application note.
Note: This application note assumes that you are already familiar with MAXQ microcontroller TAP and basic JTAG communication. For detailed information on these topics, please refer to the MAXQ series user guide. The interface with the firmware adopts 115200bps, 8-bit, no checksum and 1 stop bit format to connect with the serial port of the interface board to establish communication with the serial port to JTAG interface board. After the connection is established, you can use either ASCII or binary mode to interface with the firmware. The firmware defaults to ASCII mode and sends text commands to the interface board, and the results are returned as text strings. The binary mode will be explained below, in this mode all transmissions are 8-bit byte sequences. These two modes can be switched at any time by command. In ASCII mode, you can use the commands listed in Table 1. All commands are case sensitive. You can enter a group of commands on one line or one command at a time.
Table 1. Commands acceptable in any mode
As shown in the above command, the MAXQ JTAG engine has different modes: bypass mode, bootstrap load mode, background mode, and debug mode. The JTAG engine function is different in each mode. When the JTAG engine enters different modes, in addition to the commands listed above, other commands also take effect. When the bypass mode is powered on and reset, the TAP is initialized to the bypass mode. In this mode, TAP is disabled and there is no interaction with other components of the MAXQ microcontroller. To activate TAP in this mode, enter one of two additional commands: 'D' and 'L'. The 'D' command activates the online debugger, and the 'L' command activates the bootloader.
Bootstrap loading mode When the bootloader is activated using the 'L' command, data bytes can be sent directly to the MAXQ fixed-use ROM. Each byte value sent is expressed in the form of two hexadecimal characters. (For more information about the acceptable bytes for fixed-use ROM, please contact var name = "micro.software @"; var domain = "dalsemi.com"; document.write ("" + name + domain + ""); micro . (English only).) For each byte entered, the firmware outputs the bytes returned by the loader and the status bits received from the TAP. The output format is "00xx: ss", where 'xx' is the output byte and 'ss' is the status bit. Once the "Exit Loader" command (0x01) is entered, one of the 'J' commands listed in Table 1 must be used to indicate that the MAXQ of the JTAG interface board is no longer in bootloader mode. Background mode In the background mode of the JTAG engine, you can read and write JTAG breakpoint registers (BP0-BP5), read and write online debug registers (ICDC, ICDF, ICDA, and ICDD), determine when a breakpoint match occurs, and manually call the debug mode. The commands that support these operations are listed in Table 2. All commands with output in this mode have the output format "xxyy: ss", where 'xx' is the MSB of the output data, 'yy' is the LSB, and 'ss' is the status bit returned from the TAP.
Table 2. Commands in background mode
Debug mode The JTAG engine uses two methods to enter debug mode. The first method is to enter the "enter debug mode" command ("E") in background mode. The second method is to activate the debug mode when a breakpoint match occurs. In this case, the "JD" command should be entered to notify the firmware that the mode has changed. In debug mode, you can read and write the MAXQ register, read the program stack, read and write data memory, single-step MAXQ CPU, return to the background mode, verify the password to unlock certain commands. Table 3 lists the commands supported by this function.
Table 3. Commands in debug mode
Note: All background mode commands listed in Table 2 (except 'E') can also be used in debug mode. The commands described in the binary transmission tables 1, 2 and 3 can be easily entered manually, and the output is easy to understand. But in many cases, the JTAG interface board will be controlled by software. Because the software is inconvenient to use ASCII commands, there is also unnecessary processing when converting the results back to binary data. Therefore, JTAG firmware also supports binary transmission. In the binary transmission mode, the data is transferred to the TAP, a byte is first sent to indicate the number of bytes to be sent, and then the data is sent. For each byte of data sent, the firmware outputs two bytes. The first byte returned is the status bit read during transmission. The second byte is the value read from the TAP during transmission. The binary mode also has special commands. These commands are described in Table 4. When sending these special commands, the length byte should be 0 to instruct the firmware to treat the next byte received as a special command. For these special commands, a single byte is returned. This is usually just a response to the command.
Table 4. Special commands used in binary transmission
Detecting errors In ASCII transmission mode and binary transmission mode, any errors that occur are indicated by the output of the command. In ASCII mode, the error output form is "* ERR = xx *", where xx is the error type. In binary mode, an error code is output instead of a command response. Please refer to Table 5 for error code description.
Table 5. Error codes
Conclusion Using the commands described in this document, the serial to JTAG interface board can be used to load code to the MAXQ processor, read and write system registers, read and write memory, and use an online debugger. This process can be completed automatically through host software using a binary protocol or through interactive input from a terminal program. Provide the functional modules required for all commands to fully control the MAXQ system.
Introduction The MAXQ microcontroller uses a test access port (TAP) to communicate with the host device through a 4-wire synchronous serial interface. The TAP supports in-system programming and online debugging. TAP is compatible with JTAG IEEE standard 1149. In order to realize the connection with TAP, Dallas Semiconductor has developed a serial port to JTAG interface board and firmware, accepts commands through a standard RS-232 serial port, and converts these commands into appropriate JTAG signals. This application note describes the command protocol used by the firmware. If you need more detailed information of serial port to JTAG interface board, please email the question to var name = "micro.software @"; var domain = "dalsemi.com"; document.write ("" + name + domain + ""); micro. (English only).
Download: Source program and schematic in this application note.
Note: This application note assumes that you are already familiar with MAXQ microcontroller TAP and basic JTAG communication. For detailed information on these topics, please refer to the MAXQ series user guide. The interface with the firmware adopts 115200bps, 8-bit, no checksum and 1 stop bit format to connect with the serial port of the interface board to establish communication with the serial port to JTAG interface board. After the connection is established, you can use either ASCII or binary mode to interface with the firmware. The firmware defaults to ASCII mode and sends text commands to the interface board, and the results are returned as text strings. The binary mode will be explained below, in this mode all transmissions are 8-bit byte sequences. These two modes can be switched at any time by command. In ASCII mode, you can use the commands listed in Table 1. All commands are case sensitive. You can enter a group of commands on one line or one command at a time.
Table 1. Commands acceptable in any mode
| command | Explanation |
| h | Keep reset, MAXQ stops running. |
| H | Release RESET to make MAXQ work. |
| I | Put the system into bypass mode, reset the TAP, and return it to the Run-Test-Idle state. |
| JB | Instruct the firmware to start accepting background mode commands. This command does not switch the target MAXQ mode, nor does it send any JTAG commands to the target device. This command only instructs the firmware MAXQ to change the mode by other means. |
| JD | Instruct the firmware to start accepting debug mode commands. This command does not switch the target MAXQ mode, nor does it send any JTAG commands to the target device. This command only instructs the firmware MAXQ to change the mode by other means. |
| JL | Instruct the firmware to start accepting the bootloader command. This command does not switch the target MAXQ mode, nor does it send any JTAG commands to the target device. This command only instructs the firmware MAXQ to change the mode by other means. |
| JX | Instruct the firmware to start accepting bypass mode commands. This command does not switch the target MAXQ mode, nor does it send any JTAG commands to the target device. This command only instructs the firmware MAXQ to change the mode by other means. |
| Q | Query the interface version number of the JTAG interface board. The version number is output in the form of two hexadecimal characters. Whenever any command format or output changes, the version number changes. At the time of writing, the interface version number is 01. |
| q | Query the firmware version number of the JTAG interface board. The version number is output in the form of two hexadecimal characters. Whenever the firmware changes, the version number changes. At the time of writing, the firmware version number is 02. |
| Vtxxyy | Set the JTAG interface board TImer0. Since the JTAG clock must be less than 1/8 of the target clock, the firmware uses TImer0 to control the JTAG clock rate. The firmware waits for the timer to overflow before generating each edge of the JTAG clock. Replace the 't' in the command with the value of the timer T0M bit, replace the 'xx' with the TH0 value, and replace the 'yy' with the TL0 value. All values ​​are entered in hexadecimal format. For more information on these values, please refer to the Ultra High Speed ​​Flash Microcontroller User Guide. |
| Yrbbdd | Send a value directly to TAP. Replace 'r' with the TAP register you wish to write: 0 is DR and 1 is IR. 'bb' is the number of bits to be written (not including status bits), and 'dd' is the data sent. All values ​​should be entered in hexadecimal format. |
| Z | Switch the firmware to binary transfer. |
| z | Perform a single pulse of the JTAG clock. |
| + | Carry out a simple hardware test of the JTAG interface board. CLK, TMS and TDI pins are all set high, read TDO status, the output is '0' or '1'. The pin voltage can then be measured to check whether it is working properly. |
| - | Carry out a simple hardware test of the JTAG interface board. The CLK, TMS and TDI pins are all set low, read the TDO status, the output is '0' or '1'. The pin voltage can then be measured to check whether it is working properly. |
As shown in the above command, the MAXQ JTAG engine has different modes: bypass mode, bootstrap load mode, background mode, and debug mode. The JTAG engine function is different in each mode. When the JTAG engine enters different modes, in addition to the commands listed above, other commands also take effect. When the bypass mode is powered on and reset, the TAP is initialized to the bypass mode. In this mode, TAP is disabled and there is no interaction with other components of the MAXQ microcontroller. To activate TAP in this mode, enter one of two additional commands: 'D' and 'L'. The 'D' command activates the online debugger, and the 'L' command activates the bootloader.
Bootstrap loading mode When the bootloader is activated using the 'L' command, data bytes can be sent directly to the MAXQ fixed-use ROM. Each byte value sent is expressed in the form of two hexadecimal characters. (For more information about the acceptable bytes for fixed-use ROM, please contact var name = "micro.software @"; var domain = "dalsemi.com"; document.write ("" + name + domain + ""); micro . (English only).) For each byte entered, the firmware outputs the bytes returned by the loader and the status bits received from the TAP. The output format is "00xx: ss", where 'xx' is the output byte and 'ss' is the status bit. Once the "Exit Loader" command (0x01) is entered, one of the 'J' commands listed in Table 1 must be used to indicate that the MAXQ of the JTAG interface board is no longer in bootloader mode. Background mode In the background mode of the JTAG engine, you can read and write JTAG breakpoint registers (BP0-BP5), read and write online debug registers (ICDC, ICDF, ICDA, and ICDD), determine when a breakpoint match occurs, and manually call the debug mode. The commands that support these operations are listed in Table 2. All commands with output in this mode have the output format "xxyy: ss", where 'xx' is the MSB of the output data, 'yy' is the LSB, and 'ss' is the status bit returned from the TAP.
Table 2. Commands in background mode
| command | Explanation |
| A | Read ICDA register |
| axxyy | Write the ICDA register, where 'xx' is the MSB of the new value and 'yy' is the LSB of the new value. Enter as two hexadecimal characters. |
| Bi | Read one of the 6 breakpoint registers, 'i' is the index of the breakpoint register to read (0 to 5). |
| bixxyy | Write one of the 6 breakpoint registers, 'i' is the breakpoint register index to write (0 to 5), 'xx' is the MSB of the new value, and 'yy' is the LSB. The values ​​of MSB and LSB should be entered as two hexadecimal characters. |
| C | Read the ICDC register. |
| cxx | Write the ICDC register, 'xx' is the new value. The new value should be entered as two hexadecimal characters. |
| D | Read the ICDD register. |
| dxxyy | Write the ICDD register, 'xx' is the MSB of the new value, and 'yy' is the LSB of the new value. The new value should be entered as two hexadecimal characters. |
| E | Enter debug mode. |
| F | Read the ICDF register. |
| N | No operation. |
Table 3. Commands in debug mode
| command | Explanation |
| E | Exit debug mode and return to background mode. |
| G | Read all register contents. The return order of the register contents depends on the type of MAXQ. |
| Mxxyyiijj | When reading data memory, 'xx' is the MSB of the word address to be read, 'yy' is the LSB of the address, 'ii' is the MSB of the number to be read, and 'jj' is its LSB. All values ​​should be entered as two hexadecimal characters. |
| mxxyyiijj | Write a word to data memory, 'xx' is the MSB of the word address, 'yy' is the LSB of the address, 'ii' is the MSB of the word to be written, and 'jj' is the LSB of the word to be written. All values ​​should be entered as two hexadecimal characters. |
| n | No operation. |
| Pxx1 ... xx32 | Match the password with the given data. All 32-byte values ​​should be entered as two hexadecimal characters. |
| R0iim | Read the register, 'ii' is the register index, 'm' is the register modulus. The index should be entered as two hexadecimal characters, and the modulus should be entered as one hexadecimal character. |
| r0iimxxyy | To write a register, 'ii' is the register index, 'm' is the register modulus, 'xx' is the MSB of the new value, and 'yy' is the LSB. Each byte of the index and new value should be entered as two hexadecimal characters. The modulus should be entered as a hexadecimal character. |
| Sxxyyiijj | Reading the program stack, 'xx' is the MSB of the word address to be read, 'yy' is the LSB of the address, 'ii' is the MSB of the number to be read, and 'jj' is its LSB. All values ​​should be entered as two hexadecimal characters. |
| T | The instruction is executed at the current instruction pointer. |
Note: All background mode commands listed in Table 2 (except 'E') can also be used in debug mode. The commands described in the binary transmission tables 1, 2 and 3 can be easily entered manually, and the output is easy to understand. But in many cases, the JTAG interface board will be controlled by software. Because the software is inconvenient to use ASCII commands, there is also unnecessary processing when converting the results back to binary data. Therefore, JTAG firmware also supports binary transmission. In the binary transmission mode, the data is transferred to the TAP, a byte is first sent to indicate the number of bytes to be sent, and then the data is sent. For each byte of data sent, the firmware outputs two bytes. The first byte returned is the status bit read during transmission. The second byte is the value read from the TAP during transmission. The binary mode also has special commands. These commands are described in Table 4. When sending these special commands, the length byte should be 0 to instruct the firmware to treat the next byte received as a special command. For these special commands, a single byte is returned. This is usually just a response to the command.
Table 4. Special commands used in binary transmission
| command | Explanation |
| 0x00 | Exit binary mode transmission and accept ASCII commands again. |
| 0x01 | Set the TAP IR register as the data transfer destination register. |
| 0x02 | Set the TAP DR register as the data transfer destination register. |
| 0x03 | When transferring data, only the lower 3 bits of each byte are sent. |
| 0x04 | Set the RESET pin to a logic high level. |
| 0x05 | Clear the RESET pin to a logic low level. |
| 0x06 | Perform a single pulse of the JTAG clock. |
| 0x07 | Read the state of the TDO pin. |
| 0x08 | When transmitting data, all 8 bits of each byte are sent. |
| 0x09 | Set the TMS pin to a logic high level. |
| 0x0A | Clear the TMS pin to a logic low level. |
| 0x0B | Set the TDI pin to a logic high level. |
| 0x0C | Clear the TDI pin to a logic low level. |
| 0x0D | Set the T0M bit. For detailed information about this bit, please refer to the description of the 'V' command in Table 1. |
| 0x0E | Clear the T0M bit. For detailed information about this bit, please refer to the description of the 'V' command in Table 1. |
| 0x11 | Use the next byte received as the TL0 value. When sending the "next" byte, there is no need to send a length byte first, and do not need '0' as a special command description character. For detailed information on the TL0 register, please refer to the description of the 'V' command in Table 1. |
| 0x12 | Use the next byte received as the TH0 value. When sending the "next" byte, there is no need to send a length byte first, and do not need '0' as a special command description character. For details of the TH0 register, please refer to the description of the 'V' command in Table 1. |
Table 5. Error codes
| error code | Explanation |
| 0x80 | Unrecognized command or invalid command. |
| 0x90 | An invalid hexadecimal character was received. |
| 0xA0 | Insufficient input received. |
| 0xB0 | Error breakpoint register index. |
| 0xC? | Unexpected status received, where? Represents the status bit received. |
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