I am a recent graduate. I entered the company and found that the fpga used by the company is almost all xilinx, almost all related to wireless communication. I have been busy with work recently. I haven’t taken the time to take a good look, sorry, and get down to business. I took the time to analyze the board carefully this evening. I learned about the function of each chip on the board according to the schematic diagram. For example, CDCE913 is a programmable clock synthesizer, CP2102 is a USB to serial port chip, DP83848J Ethernet transceiver, TPS65708 is TI. Power management module and more. Overall, this board function is still very powerful, but I think it will take some time to be able to play or use each of the corresponding chips on the board.
In order to get a quicker understanding of it, since the running light is running when the board is opened, I decided to write a simple led water light experiment first. Generally speaking, the development environment is nothing more than a new project (note that the project file name is not required. In Chinese, don't use numbers at the beginning, select devices, create source files (verilog), write programs, check syntax errors, emulate, assign pins, download, run.
Verilog simple led program is as follows
Module STREAM_LED ( SYSCLK, RST_B, LED_DATA ); input SYSCLK;
Input RST_B;
Output [9:0] LED_DATA; //LED data output.
Wire SYSCLK;wire RST_B;
Reg [9:0] LED_DATA;
Reg [20:0] TIME_CNT;
Reg [9:0] LED_DATA_N;
Wire [20:0] TIME_CNT_N;
Always @(negedge RST_B or negedge SYSCLK) begin if(!RST_B) TIME_CNT <= 21'b0; else TIME_CNT <= TIME_CNT_N;end
Assign TIME_CNT_N = TIME_CNT + 21'b1;
Always @(negedge RST_B or negedge SYSCLK) begin if(!RST_B) LED_DATA <= 10'b11_1111_1110; else LED_DATA <= LED_DATA_N;end
Always @ (*)begin if((LED_DATA == 10'b01_1111_1111) && (TIME_CNT == 24'h0)) LED_DATA_N = 10'b11_1111_1110; else if(TIME_CNT == 24'h0) LED_DATA_N = {LED_DATA[8:0 ] , 1'h1}; else LED_DATA_N = LED_DATA; end
Endmodule
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