Method for shortening the scan cycle of PLC program

The scan cycle is an important indicator of the PLC. The scan cycle of a small PLC is generally from ten to several tens of milliseconds. The length of the scan cycle of the PLC depends on the scan speed and the length of the user program. The scan time in milliseconds is usually allowed for general industrial equipment, and the short delay of the PLC to the input is also allowed. However, for devices that respond quickly to certain I/Os, appropriate actions should be taken. If you select a high-speed CPU, increase the scanning speed; select fast response module, high-speed counting module and different interrupt processing to reduce the lag time.

Improve PLC operation efficiency and shorten execution time when completing the same task.

You can avoid using "double words" when using "words". When you can use integers, try to avoid real numbers.

Priority is given to IB, IW, ID, QB, QW, QD (except hardware connections), followed by M, S;

Try to avoid data type conversion. When you have to use it, try to use AC to store intermediate variables and reduce the number of conversions. Or, when programming, first reserve the storage space. For example, when VW2 is used to store an integer, VW0 is not used, and the data in VW2 can be directly accessed in the form of VD0.

Reduce unnecessary network scanning, classify networks that can be conditionally executed (especially AIW, AQW) into subroutines for conditional calls (such as timed interrupts);

Use XOR instruction to achieve arbitrary bit negation (this instruction is slightly more difficult, more need to be carefully aligned during debugging, binary number is recommended when programming);

Under the premise of ensuring the process requirements, appropriately reduce the frequency of interruptions;

The subroutine should minimize the number of conditional judgments, normalize the subroutine import and export parameters, and thus reduce code redundancy.

For repetitive, time-consuming tasks, sub-cycle processing should be used; this includes: apportioning the initialization work to multiple cycles. The sampling time of multiple PID loops is slightly different to avoid multiple interrupt calls in the same cycle, which makes the scan cycle more uniform and stable.

For subroutine calls with less input data, you can first determine whether the input data has changed. If there is no change (for comparison, refer to the 48th floor), you can skip the subroutine directly, thus reducing the scan cycle.

Try to arrange the bit variable in the V area in V511.7, and arrange the VB/VW/VD variable with high frequency to be placed in V4095, which can shorten the program scanning period.

If SM0.0 is connected in series with other signals, it only increases the program size and execution time. It has no other effect (if the network has already met the necessary contacts on the left side, it is not necessary to connect SM0.0 in parallel);

When there is no need to share signals, multiple instructions placed in the same network will generate additional inbound and outbound operations (which can be converted to STL for analysis), and if not logical, avoid horizontal in-line, so that at least one can be reduced. With the "instruction. The benefit is just to put it in a network and feel a bit compact.

Reasonable use of the immediate IO command (to minimize use) saves the conversion time of the PLC processing immediate instructions.

Try to use the calculation result memory instead of the transition memory in the calculation.

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